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Xilinx DDS Compiler IP Tutorial on the Ultra96 - jpralves.net

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Frequency Swept Source using Xilinx DDS Compiler | CustomWritings

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DSP for FPGA: Custom AXI4-Stream FIR filter IP in Vivado — Knitronics

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FPGA DSP: FIR Filter with DDS Compiler in Vivado - Hackster.io

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Xilinx adds FPGA-DSP-development kits - EDN

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GitHub - ghz-ws/fpga_dsp: DSP by FPGA

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GitHub - nmikstas/dsp-in-fpga: FPGA filter implementations using HLS

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